In solid-state memory such as flash memory and phase change memory (PCM), the fundamental storage unit (the “cell”) can be programmed to a number of different states, or “levels”, which exhibit different electrical characteristics. The q programming levels can be used to represent different data values, whereby data can be recorded in the cells. In multilevel-cell (MLC) memories, the cells have q>2 levels, providing for storage of more than one bit per cell.
Each of the q programming levels in MLC memory corresponds to a respective value of a characteristic metric which is used as a measure of cell-state. This metric is typically some function of cell current, voltage, or resistance. A cell is programmed to a particular level using the corresponding metric value as the target metric value for the programming operation. A programming (current or voltage) signal is applied to the cell so as to induce a cell-state corresponding to the target metric value. This is typically achieved via an iterative “write-and verify” (WAV) process involving a series of programming pulses, with the cell being read after each pulse and the resulting read metric value compared with the target metric value for the required level. Successive programming pulses are then adjusted based on this comparison so as to converge on the target metric value for the level.
In an ideal scenario, all cells programmed to a particular level should yield the target metric value on readback. Due to variability and noise, however, the read metric values from a group of cells programmed to the same level form a distribution around the target metric value for that level. In addition, read metric values for levels are known to drift over time. The electrical resistance of PCM cells, for instance, drifts upwards with time in a stochastic manner. As another example, in flash memory cells the transistor's threshold voltage provides the cell-state metric and this drifts upwards as a function of the number of write/erase cycles the cell is subjected to. Drift can be variable for different cells and for different levels. In PCM cells, for example, levels drift in a non-uniform fashion, cells programmed to the same level exhibit different drift characteristics, and variability due to drift affects different levels in different ways. In addition to drift, the cell readout process is prone to noise, the variance and spectral density of which are different for different levels. All these characteristics lead to the fact that the probability density functions (PDFs) for cell-levels are not only level-dependent but are also time-varying, as in PCM, and/or varying with cell-usage, as in flash memory.
A problem arising from drift effects is that the read metric values for cells programmed to neighbouring programming levels may interfere over time, causing difficulties in detecting the different cell-levels on readback. This leads to an increased probability of read-errors. MLC memory needs to offer acceptable error-rate performance, and to guarantee this acceptable performance over a minimum specified time period (the “retention time” of the memory). The placement of programming levels within the available signal range, i.e. the particular selection of target metric values for programming the q levels, plays a defining role in the achievement of these objectives.
Conventionally, the level placement problem has been solved by an optimization technique which receives as input the statistical distributions of the q possible levels. An initial set of q levels is typically defined by assuming uniform level-spacing across the available signal range. The statistics of these levels are determined from the measured read metric values on programming groups of cells to the different levels. The means and variances of the level distributions are then input to an iterative optimization process to determine an optimal level placement. Such iterative optimization algorithms are well-known and can be constructed by established techniques discussed, for example, in “Detection of Signals in Noise”, A. D. Whalen, Academic Press, 1971. The optimal level placement is determined as that which minimizes the read-error probability as calculated from the level statistics on programming of the initial level set. However, an optimal solution here would actually require knowledge of the probability density functions for all possible target levels within the signal range. Moreover, the drift effects discussed above are not considered.
U.S. Pat. No. 8,009,455 B2 discloses a procedure for assigning resistance value ranges to storage levels in phase-change memory. Each resistance range includes a first sub-range determined by the probability distribution of the level at the time of programming, and a second sub-range determined by the drift coefficient of the particular level. The second sub-range acts as a buffer region between a particular level and the neighbouring level. Ranges can be assigned based on various deterministic criteria, e.g. so that the drift buffer associated with the worst-case drift coefficient accommodates a target retention time for the memory.